xine-lib: xine-lib-1.2.13/src/xine-utils/xine_mmx.h Source File

xine-lib 1.2.13-20230125hg15249

xine_mmx.h
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1/*
2 * Copyright (C) 2000-2017 the xine project
3 *
4 * This file is part of xine, a free video player.
5 *
6 * xine is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * xine is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 */
20#ifndef XINE_MMX_H
21#define XINE_MMX_H
22
23#if defined(ARCH_X86)
24
25#include <xine/attributes.h>
26
27#if !defined(ATTRIBUTE_ALIGNED_MAX)
28# warning ATTRIBUTE_ALIGNED_MAX undefined. Alignment of data structures does not work !
29#elif ATTRIBUTE_ALIGNED_MAX < 16
30# warning Compiler does not support proper alignment for SSE2 !
31#endif
32
33typedef union {
34 int64_t q; /* Quadword (64-bit) value */
35 uint64_t uq; /* Unsigned Quadword */
36 int d[2]; /* 2 Doubleword (32-bit) values */
37 unsigned int ud[2]; /* 2 Unsigned Doubleword */
38 short w[4]; /* 4 Word (16-bit) values */
39 unsigned short uw[4]; /* 4 Unsigned Word */
40 char b[8]; /* 8 Byte (8-bit) values */
41 unsigned char ub[8]; /* 8 Unsigned Byte */
42 float s[2]; /* Single-precision (32-bit) value */
43} ATTR_ALIGN(8) mmx_t; /* On an 8-byte (64-bit) boundary */
44
45
46
47#define mmx_i2r(op,imm,reg) \
48 __asm__ __volatile__ (#op " %0, %%" #reg \
49 : /* nothing */ \
50 : "i" (imm) )
51
52#define mmx_m2r(op,mem,reg) \
53 __asm__ __volatile__ (#op " %0, %%" #reg \
54 : /* nothing */ \
55 : "m" (mem))
56
57/* load dword from memory or gp register */
58#define mmx_a2r(op,any,reg) \
59 __asm__ __volatile__ (#op " %0, %%" #reg \
60 : /* nothing */ \
61 : "g" (any))
62
63#define mmx_r2m(op,reg,mem) \
64 __asm__ __volatile__ (#op " %%" #reg ", %0" \
65 : "=m" (mem) \
66 : /* nothing */ )
67
68#define mmx_r2a(op,reg,any) \
69 __asm__ __volatile__ (#op " %%" #reg ", %0" \
70 : "=g" (any) \
71 : /* nothing */ )
72
73#define mmx_r2r(op,regs,regd) \
74 __asm__ __volatile__ (#op " %" #regs ", %" #regd)
75
76
77#define emms() __asm__ __volatile__ ("emms")
78
79#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
80#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
81#define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
82#define movd_a2r(any,reg) mmx_a2r (movd, any, reg)
83#define movd_r2a(reg,any) mmx_r2a (movd, reg, any)
84
85#define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
86#define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
87#define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
88
89#define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
90#define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
91#define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
92#define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
93
94#define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
95#define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
96
97#define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
98#define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
99#define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
100#define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
101#define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
102#define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
103
104#define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
105#define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
106#define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
107#define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
108
109#define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
110#define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
111#define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
112#define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
113
114#define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
115#define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
116
117#define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
118#define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
119
120#define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
121#define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
122#define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
123#define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
124#define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
125#define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
126
127#define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
128#define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
129#define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
130#define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
131#define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
132#define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
133
134#define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
135#define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
136
137#define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
138#define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
139
140#define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
141#define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
142
143#define por_m2r(var,reg) mmx_m2r (por, var, reg)
144#define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
145
146#define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
147#define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
148#define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
149#define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
150#define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
151#define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
152#define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
153#define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
154#define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
155
156#define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
157#define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
158#define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
159#define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
160#define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
161#define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
162
163#define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
164#define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
165#define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
166#define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
167#define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
168#define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
169#define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
170#define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
171#define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
172
173#define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
174#define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
175#define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
176#define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
177#define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
178#define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
179
180#define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
181#define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
182#define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
183#define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
184
185#define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
186#define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
187#define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
188#define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
189
190#define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
191#define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
192#define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
193#define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
194#define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
195#define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
196
197#define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
198#define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
199#define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
200#define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
201#define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
202#define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
203
204#define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
205#define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
206
207
208/* 3DNOW extensions */
209
210#define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
211#define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
212
213
214/* AMD MMX extensions - also available in intel SSE */
215
216
217#define mmx_m2ri(op,mem,reg,imm) \
218 __asm__ __volatile__ (#op " %1, %0, %%" #reg \
219 : /* nothing */ \
220 : "X" (mem), "X" (imm))
221#define mmx_r2ri(op,regs,regd,imm) \
222 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
223 : /* nothing */ \
224 : "X" (imm) )
225
226#define mmx_fetch(mem,hint) \
227 __asm__ __volatile__ ("prefetch" #hint " %0" \
228 : /* nothing */ \
229 : "X" (mem))
230
231
232#define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
233
234#define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
235
236#define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
237#define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
238#define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
239#define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
240
241#define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
242
243#define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
244
245#define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
246#define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
247
248#define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
249#define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
250
251#define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
252#define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
253
254#define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
255#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
256
257#define pmovmskb(mmreg,reg) \
258 __asm__ __volatile__ ("pmovmskb %" #mmreg ", %" #reg)
259#define pmovmskb_r2a(mmreg,regvar) \
260 __asm__ __volatile__ ("pmovmskb %%" #mmreg ", %0" : "=r" (regvar))
261
262#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
263#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
264
265#define prefetcht0(mem) mmx_fetch (mem, t0)
266#define prefetcht1(mem) mmx_fetch (mem, t1)
267#define prefetcht2(mem) mmx_fetch (mem, t2)
268#define prefetchnta(mem) mmx_fetch (mem, nta)
269
270#define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
271#define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
272
273#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
274#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
275
276#define sfence() __asm__ __volatile__ ("sfence\n\t")
277
278typedef union {
279 int64_t q[2]; /* Quadword (64-bit) value */
280 uint64_t uq[2]; /* Unsigned Quadword */
281 int32_t d[4]; /* Doubleword (32-bit) values */
282 uint32_t ud[4]; /* Unsigned Doubleword */
283 short w[8]; /* Word (16-bit) values */
284 unsigned short uw[8]; /* Unsigned Word */
285 char b[16]; /* Byte (8-bit) values */
286 unsigned char ub[16]; /* Unsigned Byte */
287 float sf[4]; /* Single-precision (32-bit) value */
288} ATTR_ALIGN(16) sse_t; /* On a 16 byte (128-bit) boundary */
289
290#define FILL_SSE_UW(w) {uw:{w,w,w,w,w,w,w,w}}
291
292#define sse_i2r(op, imm, reg) \
293 __asm__ __volatile__ (#op " %0, %%" #reg \
294 : /* nothing */ \
295 : "X" (imm) )
296
297#define sse_m2r(op, mem, reg) \
298 __asm__ __volatile__ (#op " %0, %%" #reg \
299 : /* nothing */ \
300 : "X" (mem))
301
302#define sse_r2m(op, reg, mem) \
303 __asm__ __volatile__ (#op " %%" #reg ", %0" \
304 : "=X" (mem) \
305 : /* nothing */ )
306
307#define sse_r2r(op, regs, regd) \
308 __asm__ __volatile__ (#op " %" #regs ", %" #regd)
309
310#define sse_r2ri(op, regs, regd, imm) \
311 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
312 : /* nothing */ \
313 : "X" (imm) )
314
315#define sse_m2ri(op, mem, reg, subop) \
316 __asm__ __volatile__ (#op " %0, %%" #reg ", " #subop \
317 : /* nothing */ \
318 : "X" (mem))
319
320
321#define movaps_m2r(var, reg) sse_m2r(movaps, var, reg)
322#define movaps_r2m(reg, var) sse_r2m(movaps, reg, var)
323#define movaps_r2r(regs, regd) sse_r2r(movaps, regs, regd)
324
325#define movntps_r2m(xmmreg, var) sse_r2m(movntps, xmmreg, var)
326
327#define movups_m2r(var, reg) sse_m2r(movups, var, reg)
328#define movups_r2m(reg, var) sse_r2m(movups, reg, var)
329#define movups_r2r(regs, regd) sse_r2r(movups, regs, regd)
330
331#define movhlps_r2r(regs, regd) sse_r2r(movhlps, regs, regd)
332
333#define movlhps_r2r(regs, regd) sse_r2r(movlhps, regs, regd)
334
335#define movhps_m2r(var, reg) sse_m2r(movhps, var, reg)
336#define movhps_r2m(reg, var) sse_r2m(movhps, reg, var)
337
338#define movlps_m2r(var, reg) sse_m2r(movlps, var, reg)
339#define movlps_r2m(reg, var) sse_r2m(movlps, reg, var)
340
341#define movss_m2r(var, reg) sse_m2r(movss, var, reg)
342#define movss_r2m(reg, var) sse_r2m(movss, reg, var)
343#define movss_r2r(regs, regd) sse_r2r(movss, regs, regd)
344
345#define shufps_m2r(var, reg, index) sse_m2ri(shufps, var, reg, index)
346#define shufps_r2r(regs, regd, index) sse_r2ri(shufps, regs, regd, index)
347
348#define cvtpi2ps_m2r(var, xmmreg) sse_m2r(cvtpi2ps, var, xmmreg)
349#define cvtpi2ps_r2r(mmreg, xmmreg) sse_r2r(cvtpi2ps, mmreg, xmmreg)
350
351#define cvtps2pi_m2r(var, mmreg) sse_m2r(cvtps2pi, var, mmreg)
352#define cvtps2pi_r2r(xmmreg, mmreg) sse_r2r(cvtps2pi, mmreg, xmmreg)
353
354#define cvttps2pi_m2r(var, mmreg) sse_m2r(cvttps2pi, var, mmreg)
355#define cvttps2pi_r2r(xmmreg, mmreg) sse_r2r(cvttps2pi, mmreg, xmmreg)
356
357#define cvtsi2ss_m2r(var, xmmreg) sse_m2r(cvtsi2ss, var, xmmreg)
358#define cvtsi2ss_r2r(reg, xmmreg) sse_r2r(cvtsi2ss, reg, xmmreg)
359
360#define cvtss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg)
361#define cvtss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg)
362
363#define cvttss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg)
364#define cvttss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg)
365
366#define movmskps(xmmreg, reg) \
367 __asm__ __volatile__ ("movmskps %" #xmmreg ", %" #reg)
368
369#define addps_m2r(var, reg) sse_m2r(addps, var, reg)
370#define addps_r2r(regs, regd) sse_r2r(addps, regs, regd)
371
372#define addss_m2r(var, reg) sse_m2r(addss, var, reg)
373#define addss_r2r(regs, regd) sse_r2r(addss, regs, regd)
374
375#define subps_m2r(var, reg) sse_m2r(subps, var, reg)
376#define subps_r2r(regs, regd) sse_r2r(subps, regs, regd)
377
378#define subss_m2r(var, reg) sse_m2r(subss, var, reg)
379#define subss_r2r(regs, regd) sse_r2r(subss, regs, regd)
380
381#define mulps_m2r(var, reg) sse_m2r(mulps, var, reg)
382#define mulps_r2r(regs, regd) sse_r2r(mulps, regs, regd)
383
384#define mulss_m2r(var, reg) sse_m2r(mulss, var, reg)
385#define mulss_r2r(regs, regd) sse_r2r(mulss, regs, regd)
386
387#define divps_m2r(var, reg) sse_m2r(divps, var, reg)
388#define divps_r2r(regs, regd) sse_r2r(divps, regs, regd)
389
390#define divss_m2r(var, reg) sse_m2r(divss, var, reg)
391#define divss_r2r(regs, regd) sse_r2r(divss, regs, regd)
392
393#define rcpps_m2r(var, reg) sse_m2r(rcpps, var, reg)
394#define rcpps_r2r(regs, regd) sse_r2r(rcpps, regs, regd)
395
396#define rcpss_m2r(var, reg) sse_m2r(rcpss, var, reg)
397#define rcpss_r2r(regs, regd) sse_r2r(rcpss, regs, regd)
398
399#define rsqrtps_m2r(var, reg) sse_m2r(rsqrtps, var, reg)
400#define rsqrtps_r2r(regs, regd) sse_r2r(rsqrtps, regs, regd)
401
402#define rsqrtss_m2r(var, reg) sse_m2r(rsqrtss, var, reg)
403#define rsqrtss_r2r(regs, regd) sse_r2r(rsqrtss, regs, regd)
404
405#define sqrtps_m2r(var, reg) sse_m2r(sqrtps, var, reg)
406#define sqrtps_r2r(regs, regd) sse_r2r(sqrtps, regs, regd)
407
408#define sqrtss_m2r(var, reg) sse_m2r(sqrtss, var, reg)
409#define sqrtss_r2r(regs, regd) sse_r2r(sqrtss, regs, regd)
410
411#define andps_m2r(var, reg) sse_m2r(andps, var, reg)
412#define andps_r2r(regs, regd) sse_r2r(andps, regs, regd)
413
414#define andnps_m2r(var, reg) sse_m2r(andnps, var, reg)
415#define andnps_r2r(regs, regd) sse_r2r(andnps, regs, regd)
416
417#define orps_m2r(var, reg) sse_m2r(orps, var, reg)
418#define orps_r2r(regs, regd) sse_r2r(orps, regs, regd)
419
420#define xorps_m2r(var, reg) sse_m2r(xorps, var, reg)
421#define xorps_r2r(regs, regd) sse_r2r(xorps, regs, regd)
422
423#define maxps_m2r(var, reg) sse_m2r(maxps, var, reg)
424#define maxps_r2r(regs, regd) sse_r2r(maxps, regs, regd)
425
426#define maxss_m2r(var, reg) sse_m2r(maxss, var, reg)
427#define maxss_r2r(regs, regd) sse_r2r(maxss, regs, regd)
428
429#define minps_m2r(var, reg) sse_m2r(minps, var, reg)
430#define minps_r2r(regs, regd) sse_r2r(minps, regs, regd)
431
432#define minss_m2r(var, reg) sse_m2r(minss, var, reg)
433#define minss_r2r(regs, regd) sse_r2r(minss, regs, regd)
434
435#define cmpps_m2r(var, reg, op) sse_m2ri(cmpps, var, reg, op)
436#define cmpps_r2r(regs, regd, op) sse_r2ri(cmpps, regs, regd, op)
437
438#define cmpeqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 0)
439#define cmpeqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 0)
440
441#define cmpltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 1)
442#define cmpltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 1)
443
444#define cmpleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 2)
445#define cmpleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 2)
446
447#define cmpunordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 3)
448#define cmpunordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 3)
449
450#define cmpneqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 4)
451#define cmpneqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 4)
452
453#define cmpnltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 5)
454#define cmpnltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 5)
455
456#define cmpnleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 6)
457#define cmpnleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 6)
458
459#define cmpordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 7)
460#define cmpordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 7)
461
462#define cmpss_m2r(var, reg, op) sse_m2ri(cmpss, var, reg, op)
463#define cmpss_r2r(regs, regd, op) sse_r2ri(cmpss, regs, regd, op)
464
465#define cmpeqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 0)
466#define cmpeqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 0)
467
468#define cmpltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 1)
469#define cmpltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 1)
470
471#define cmpless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 2)
472#define cmpless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 2)
473
474#define cmpunordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 3)
475#define cmpunordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 3)
476
477#define cmpneqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 4)
478#define cmpneqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 4)
479
480#define cmpnltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 5)
481#define cmpnltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 5)
482
483#define cmpnless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 6)
484#define cmpnless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 6)
485
486#define cmpordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 7)
487#define cmpordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 7)
488
489#define comiss_m2r(var, reg) sse_m2r(comiss, var, reg)
490#define comiss_r2r(regs, regd) sse_r2r(comiss, regs, regd)
491
492#define ucomiss_m2r(var, reg) sse_m2r(ucomiss, var, reg)
493#define ucomiss_r2r(regs, regd) sse_r2r(ucomiss, regs, regd)
494
495#define unpcklps_m2r(var, reg) sse_m2r(unpcklps, var, reg)
496#define unpcklps_r2r(regs, regd) sse_r2r(unpcklps, regs, regd)
497
498#define unpckhps_m2r(var, reg) sse_m2r(unpckhps, var, reg)
499#define unpckhps_r2r(regs, regd) sse_r2r(unpckhps, regs, regd)
500
501#define fxrstor(mem) \
502 __asm__ __volatile__ ("fxrstor %0" \
503 : /* nothing */ \
504 : "X" (mem))
505
506#define fxsave(mem) \
507 __asm__ __volatile__ ("fxsave %0" \
508 : /* nothing */ \
509 : "X" (mem))
510
511#define stmxcsr(mem) \
512 __asm__ __volatile__ ("stmxcsr %0" \
513 : /* nothing */ \
514 : "X" (mem))
515
516#define ldmxcsr(mem) \
517 __asm__ __volatile__ ("ldmxcsr %0" \
518 : /* nothing */ \
519 : "X" (mem))
520
521/* SSE2 */
522
523#define movdqa_m2r(var, reg) mmx_m2r (movdqa, var, reg)
524#define movdqa_r2m(reg, var) mmx_r2m (movdqa, reg, var)
525#define movdqa_r2r(regs, regd) mmx_r2r (movdqa, regs, regd)
526
527#define movdqu_m2r(var, reg) mmx_m2r (movdqu, var, reg)
528#define movdqu_r2m(reg, var) mmx_r2m (movdqu, reg, var)
529
530#define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
531
532#define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
533
534#define pshufd_m2r(var, reg, imm) mmx_m2ri (pshufd, var, reg, imm)
535#define pshufd_r2r(regs, regd, imm) mmx_r2ri (pshufd, regs, regd, imm)
536
537#define pshuflw_m2r(var, reg, imm) mmx_m2ri (pshuflw, var, reg, imm)
538#define pshuflw_r2r(regs, regd, imm) mmx_r2ri (pshuflw, regs, regd, imm)
539
540/* SSSE3 */
541
542#define pmaddubsw_r2r(regs, regd) mmx_r2r(pmaddubsw, regs, regd)
543
544
545#endif /*ARCH_X86 */
546
547#endif /*XINE_MMX_H*/
attributes.h
ATTR_ALIGN
#define ATTR_ALIGN(align)
Definition attributes.h:66
mmx_t
Definition mmx.h:56